Environment for Fault Simulation Acceleration on FPGA

نویسندگان

  • Peeter Ellervee
  • Jaan Raik
  • Valentin Tihhomirov
چکیده

We present an environment to accelerate fault simulation by hardware emulation on FPGA. Fault simulation is an important subtask in test pattern generation and it is frequently used throughout the test generation process. We studied the feasibility of using reconfigurable hardware emulator instead of software simulation. Experiments showed that it is beneficial to use emulation for circuits/methods that require large numbers of test vectors, e.g., sequential circuits and/or genetic algorithms.

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تاریخ انتشار 2004